The invention relates to circuit techniques for cancelling non-linear capacitor-induced harmonic distortion, particularly that caused by collector-to-substrate parasitic capacitance in an integrated circuit. A major source of harmonic distortion in an integrated circuit amplifier has been found to be due to collector-to-substrate parasitic capacitance of the junction between an N-type epitaxial layer in which the collector of an NPN transistor is formed and the P+ substrate on which the N-type epitaxial layer is formed.
Referring to FIGS. 1A and 1B, a typical integrated circuit amplifier stage includes an NPN transistor 2 having an input conductor receiving a signal V.sub.IN. The emitter of transistor 2 is connected to one terminal of a resistor 5, which serves as a gain-setting resistor. The other terminal of resistor 5 is connected to the negative power supply -V. The collector of transistor 2, connected to conductor 4, has a parasitic non-linear junction capacitance 6 between the N-type epitaxial region 7 and the P+ substrate 8. (Other parasitic capacitances, both linear and non-linear, associated with the collector of transistor 2 are not shown. For example, collector-to-base junction capacitance and capacitance between the substrate and conductors connected to the collector affect distortion.) An output signal V.sub.OUT is produced on conductor 4, which is connected by a load resistor 3 to positive power supply +V. FIG. 1B shows the physical integrated circuit structure, and indicates the location of the parasitic substrate capacitance 6, which has a value of C1. The parasitic capacitance 6 is proportional to the total area of the bottom and side walls of the N-type epitaxial region 7.
As V.sub.IN varies, such variations are amplified by the gain R.sub.3 /R.sub.5. The V.sub.IN variation across the highly non-linear parasitic capacitance 6 produces a highly non-linear parasitic error current I.sub.P1 which is injected into or out of conductor 4 and hence into or out of a load current I.sub.L1 flowing through load resistor 3. This produces errors or non-linearities in the current I.sub.L1 flowing through the load resistor 3, and therefore substantial distortion is produced in V.sub.OUT as a result of the non-linear parasitic collector-substrate capacitance 6.
It should be appreciated that the state of the art in integrated circuit amplifier design has progressed rapidly and steadily during the past two decades. Integrated circuit amplifier designers have learned how to deal with noise sources and other sources of distortion in amplifiers very effectively. For example, the development of highly accurate amplifiers has contributed to the increased precision possible in analog-to-digital converters, which now are available with 16 bit accuracy or better. A variety of prior art techniques for reducing harmonic distortion in amplifiers are known. Various filtering feed-forward, and cancellation techniques are known in the prior art. Quite a number of known circuits have been used for cancelling or compensating a variety of inaccuracies in a variety of different kinds of circuits. Nevertheless, no technique is known for cancelling the effects of the non-linear collector-substrate capacitance in an integrated circuit amplifier.
Despite the great improvements made in high frequency, low distortion integrated circuit amplifiers, it nevertheless would be highly desirable to provide a further significant improvement in distortion performance of an integrated circuit amplifier.